In an image compression method such as the Moving Picture image coding Experts Group (MPEG) scheme where a correlation between pictures of a moving picture is used, a motion vector must be estimated for a block unit based on which motion compensation is performed. Conventionally, as a circuit which estimates this motion vector, a motion vector estimating circuit which is capable of reducing the information amount of the motion vector has been proposed (for example, refer to Patent Reference 1).
FIG. 1 is a block diagram showing the structure of a conventional motion vector estimating circuit. As shown in FIG. 1, this motion vector estimating circuit includes: frame memories 61 and 62, a motion vector storage memory 63, an inter-block difference arithmetic unit 64, an addition amount arithmetic unit 65, and a comparator 66. Here, the inter-block difference arithmetic unit 64 includes two hundred and fifty-six inter-block difference arithmetic units 64a, 64b, . . . 64c, and the addition amount arithmetic unit 65 includes two hundred and fifty-six addition amount arithmetic units 65a, 65b, . . . 65c. They perform two hundred and fifty-six searches.
First, the inter-block difference arithmetic unit 64a calculates a difference between an original macroblock (hereinafter referred to as original MB) to be inputted from the frame memory 62 and a search macroblock (hereinafter referred to as search MB) to be inputted from the frame memory 61, and outputs it as a differential amount. In addition, the inter-block difference arithmetic unit 64b outputs a differential amount between the same original MB as the one used in the inter-block difference arithmetic unit 64a and a search MB shifted by one from that used in the inter-block difference arithmetic unit 64a. Similarly, the 256th inter-block difference arithmetic unit 64c outputs a differential amount between the same original MB as the one used in the inter-block difference arithmetic unit 64a and the shifted search MB. Subsequently, each of the addition amount arithmetic circuits 65a, 65b, . . . 65c outputs a corrected differential amount by adding an addition amount to the corresponding differential amount, and codes a motion vector by the corrected differential amount of a neighboring macroblock. Next, the comparator 66 determines the optimum motion vector having the highest correlation between the original MB and the search MB. At this time, in the addition amount arithmetic circuit, the addition amount is determined depending on respective horizontal components and vertical components that motion vectors have and the coded status. More specifically, when it is assumed that the motion vector Vn at nth search point is Vn=(vnx, vny) and the previous motion vector PV determined through motion search of the immediately-previous search macroblock stored in the motion storage memory 63 is PV=(pvx, pvy), the addition amount Addn of the block differential amount is obtained by the following Equation.Addn=α·(|vnx−pvx|+|vny—pvy|) 
Here, α represents a constant, and | | represents calculation for obtaining an absolute value. The addition amount is set so as to become greater as the variance from the previous block motion vector becomes greater. Subsequently, the motion vector is coded according to the corrected differential amount corrected by the previous motion vector of the left neighboring search MB in a picture.
Patent Reference 1: Japanese Laid-open Patent Application No. 2001-197501